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» Instruction Level Parallelism
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67
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HPCA
1998
IEEE
15 years 6 months ago
Performance Evaluation of Tiling for the Register Level
Marta Jiménez, José M. Llaberí...
87
Voted
ICPP
1987
IEEE
15 years 5 months ago
DURRA : A Task-Level Description Language
Mario Barbacci, Jeannette M. Wing