2784 search results - page 62 / 557 » Instruction Level Parallelism |
ASAP
2000
IEEE
14 years 2 months ago
2000
IEEE
MicroSIMD architectures incorporating subword parallelism are very efficient for application-specific media processors as well as for fast multimedia information processing in gen...
IPPS
2006
IEEE
14 years 4 months ago
2006
IEEE
Narrow values that can be represented by less number of bits than the full machine width occur very frequently in programs. On the other hand, clustering mechanisms enable cost- a...
IEEEPACT
2000
IEEE
14 years 2 months ago
2000
IEEE
A multiprocessor prefetch scheme is described in which a miss is followed by a prefetch of a group of lines, a neighborhood, surrounding the demand-fetched line. The neighborhood ...
ASPLOS
2008
ACM
13 years 12 months ago
2008
ACM
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
Code compression has been applied to embedded systems to minimize the silicon area utilized for program memories, and lower the power consumption. More recently, it has become a n...