3 search results - page 1 / 1 » Integrated Predicated and Speculative Execution in the IMPAC... |
ISCA
1998
IEEE
14 years 23 days ago
1998
IEEE
Explicitly Parallel Instruction Computing (EPIC) architectures require the compiler to express program instruction level parallelism directly to the hardware. EPIC techniques whic...
MICRO
1994
IEEE
14 years 19 days ago
1994
IEEE
High performance architectures have always had to deal with the performance-limiting impact of branch operations. Microprocessor designs are going to have to deal with this proble...
APCSAC
2003
IEEE
14 years 5 days ago
2003
IEEE
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...