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ASPLOS
2000
ACM
13 years 12 months ago
FLASH vs. (Simulated) FLASH: Closing the Simulation Loop
Simulation is the primary method for evaluating computer systems during all phases of the design process. One significant problem with simulation is that it rarely models the syst...
Jeff Gibson, Robert Kunz, David Ofelt, Mark Heinri...
FPL
2009
Springer
132views Hardware» more  FPL 2009»
13 years 11 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem
FDL
2005
IEEE
14 years 1 months ago
Embed Scripting inside SystemC
Embedded system designs and simulations become tedious and time consuming due to the complexity of modern applications. Thus, languages allowing high level description, such as Sy...
J. Vennin, S. Penain, Luc Charest, Samy Meftali, J...
WSC
1998
13 years 9 months ago
SEAMS: Simulation Environment for VHDL-AMS
VHDL-AMS is an Analog and Mixed-Signal extension to the Very High Speed Integrated Circuit Hardware Description Language (VHDL). With the standardization of VHDL-AMS, capable and ...
Peter Frey, Kathiresan Nellayappan, Vasudevan Sahn...
CINQ
2004
Springer
225views Database» more  CINQ 2004»
14 years 28 days ago
A Data Mining Query Language for Knowledge Discovery in a Geographical Information System
Spatial data mining is a process used to discover interesting but not explicitly available, highly usable patterns embedded in both spatial and nonspatial data, which are possibly ...
Donato Malerba, Annalisa Appice, Michelangelo Ceci