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» Interconnect design methods for memory design
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INFOCOM
2005
IEEE
14 years 2 months ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas
ISLPED
2006
ACM
109views Hardware» more  ISLPED 2006»
14 years 2 months ago
Power reduction of multiple disks using dynamic cache resizing and speed control
This paper presents an energy-conservation method for multiple disks and their cache memory. Our method periodically resizes the cache memory and controls the rotation speeds unde...
Le Cai, Yung-Hsiang Lu
CGO
2003
IEEE
14 years 18 days ago
METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
Jaydeep Marathe, Frank Mueller, Tushar Mohan, Bron...
ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
14 years 2 months ago
Low-power log-MAP turbo decoding based on reduced metric memory access
Due to the powerful error correcting performance, turbo codes have been adopted in many wireless communication standards. Although several low-power techniques have been proposed,...
Dong-Soo Lee, In-Cheol Park
INFOCOM
2009
IEEE
14 years 3 months ago
Fit a Spread Estimator in Small Memory
—The spread of a source host is the number of distinct destinations that it has sent packets to during a measurement period. A spread estimator is a software/hardware module on a...
MyungKeun Yoon, Tao Li, Shigang Chen, Jih-Kwon Pei...