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ISCA
2007
IEEE
198views Hardware» more  ISCA 2007»
14 years 2 months ago
Making the fast case common and the uncommon case simple in unbounded transactional memory
Hardware transactional memory has great potential to simplify the creation of correct and efficient multithreaded programs, allowing programmers to exploit more effectively the s...
Colin Blundell, Joe Devietti, E. Christopher Lewis...
VEE
2005
ACM
143views Virtualization» more  VEE 2005»
14 years 2 months ago
Optimized interval splitting in a linear scan register allocator
We present an optimized implementation of the linear scan register allocation algorithm for Sun Microsystems’ Java HotSpotTM client compiler. Linear scan register allocation is ...
Christian Wimmer, Hanspeter Mössenböck
ICLP
2011
Springer
12 years 12 months ago
Transaction Logic with Defaults and Argumentation Theories
Transaction Logic is an extension of classical logic that gracefully integrates both declarative and procedural knowledge and has proved itself as a powerful formalism for many ad...
Paul Fodor, Michael Kifer
IPPS
2006
IEEE
14 years 2 months ago
Techniques and tools for dynamic optimization
Traditional code optimizers have produced significant performance improvements over the past forty years. While promising avenues of research still exist, traditional static and p...
Jason Hiser, Naveen Kumar, Min Zhao, Shukang Zhou,...
CASES
2010
ACM
13 years 6 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa