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HIPEAC
2011
Springer
14 years 2 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
NSPW
2003
ACM
15 years 8 months ago
SELF: a transparent security extension for ELF binaries
The ability to analyze and modify binaries is often very useful from a security viewpoint. Security operations one would like to perform on binaries include the ability to extract...
Daniel C. DuVarney, V. N. Venkatakrishnan, Sandeep...
HASE
2005
IEEE
15 years 8 months ago
Automatic Generation of Executable Assertions for Runtime Checking Temporal Requirements
Checking various temporal requirements is a key dependability concern in safety-critical systems. As modelchecking approaches do not scale well to systems of high complexity the r...
Gergely Pintér, István Majzik
IPPS
2010
IEEE
15 years 1 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
IWMM
2000
Springer
122views Hardware» more  IWMM 2000»
15 years 6 months ago
Concurrent Garbage Collection Using Program Slices on Multithreaded Processors
We investigate reference counting in the context of a multithreaded architecture by exploiting two observations: (1) reference-counting can be performed by a transformed program s...
Manoj Plakal, Charles N. Fischer