311 search results - page 1 / 63 » Issues and Approaches to Coarse-Grain Reconfigurable Archite... |
FCCM
2003
IEEE
14 years 4 months ago
2003
IEEE
Although domain-specialized FPGAs can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design...
DATE
2005
IEEE
14 years 4 months ago
2005
IEEE
Coarse-grained reconfigurable architectures aim to achieve both goals of high performance and flexibility. However, existing reconfigurable array architectures require many resour...
IPPS
2007
IEEE
14 years 5 months ago
2007
IEEE
This work addresses the problem of information leakage of cryptographic devices, by using the reconfiguration technique allied to an RNS based arithmetic. The information leaked b...
ARC
2007
Springer
14 years 3 months ago
2007
Springer
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
VLSISP
2008
13 years 10 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...