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CODES
2006
IEEE
14 years 1 months ago
A bus architecture for crosstalk elimination in high performance processor design
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
Wen-Wen Hsieh, Po-Yuan Chen, TingTing Hwang
ESCIENCE
2005
IEEE
14 years 1 months ago
The Common Instrument Middleware Architecture: Overview of Goals and Implementation
— Instruments and sensors and their accompanying actuators are essential to the conduct of scientific research. In many cases they provide observations in electronic format and ...
Tharaka Devadithya, Kenneth Chiu, Kianosh Huffman,...
ASPDAC
2001
ACM
100views Hardware» more  ASPDAC 2001»
13 years 11 months ago
Low power implementation of a turbo-decoder on programmable architectures
Low Power is an extremely important issue for future mobile radio systems. Channel decoders are essential building blocks of base-band signal processing units in mobile terminal ar...
Frank Gilbert, Alexander Worm, Norbert Wehn
WICSA
2004
13 years 9 months ago
Compositional Generation of Software Architecture Performance QN Models
Early performance analysis based on Queueing Network Models (QNM) has been often proposed to support software designers during the software development process. These approaches a...
Antinisca Di Marco, Paola Inverardi
CN
2008
162views more  CN 2008»
13 years 7 months ago
A cache-based internet protocol address lookup architecture
This paper proposes a novel Internet Protocol (IP) packet forwarding architecture for IP routers. This architecture is comprised of a non-blocking Multizone Pipelined Cache (MPC) ...
Soraya Kasnavi, Paul Berube, Vincent C. Gaudet, Jo...