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» It's Time to Stop Calling Circuits
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Publication
351views
15 years 7 months ago
Synthesizable High Level Hardware Descriptions
Modern hardware description languages support code-generation constructs like generate/endgenerate in Verilog. These constructs are intended to describe regular or parameterized ha...
Jennifer Gillenwater, Gregory Malecha, Cherif Sala...
KDD
2002
ACM
182views Data Mining» more  KDD 2002»
14 years 7 months ago
ANF: a fast and scalable tool for data mining in massive graphs
Graphs are an increasingly important data source, with such important graphs as the Internet and the Web. Other familiar graphs include CAD circuits, phone records, gene sequences...
Christopher R. Palmer, Phillip B. Gibbons, Christo...