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MICRO
1992
IEEE
133views Hardware» more  MICRO 1992»
14 years 1 months ago
Code generation schema for modulo scheduled loops
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
B. Ramakrishna Rau, Michael S. Schlansker, Parthas...
ICPPW
2006
IEEE
14 years 3 months ago
Towards a Source Level Compiler: Source Level Modulo Scheduling
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
Yosi Ben-Asher, Danny Meisler
APCSAC
2006
IEEE
14 years 3 months ago
A Context-Switch Reduction Heuristic for Power-Aware Off-Line Scheduling
Abstract. Scheduling algorithms significantly affect the performance of a realtime system. In systems with power constraints, context switches in a schedule result in wasted power ...
Biju K. Raveendran, Sundar Balasubramaniam, K. Dur...
CISS
2008
IEEE
14 years 4 months ago
Throughput of random access without message passing
— We develop distributed scheduling schemes that are based on simple random access algorithms and that have no message passing. In spite of their simplicity, these schemes are sh...
Alexandre Proutiere, Yung Yi, Mung Chiang
CODES
2002
IEEE
14 years 2 months ago
Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
Juanjo Noguera, Rosa M. Badia