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» Language Support for Synchronous Parallel Critical Sections
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LCTRTS
2005
Springer
14 years 2 months ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
14 years 27 days ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
IPPS
2009
IEEE
14 years 3 months ago
Phaser accumulators: A new reduction construct for dynamic parallelism
A reduction is a computation in which a common operation, such as a sum, is to be performed across multiple pieces of data, each supplied by a separate task. We introduce phaser a...
Jun Shirako, David M. Peixotto, Vivek Sarkar, Will...
PLDI
2006
ACM
14 years 2 months ago
Optimizing memory transactions
Atomic blocks allow programmers to delimit sections of code as ‘atomic’, leaving the language’s implementation to enforce atomicity. Existing work has shown how to implement...
Timothy L. Harris, Mark Plesko, Avraham Shinnar, D...
CVPR
2007
IEEE
14 years 10 months ago
OpenVL: Towards A Novel Software Architecture for Computer Vision
This paper presents our progress on OpenVL - a novel software architecture to address efficiency through facilitating hardware acceleration, reusability and scalability for comput...
Changsong Shen, S. Sidney Fels, James J. Little