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ISHPC
1999
Springer
14 years 24 days ago
Utilization of Cache Area in On-Chip Multiprocessor
On-chip multiprocessor can be an alternative to the wide-issue superscalar processor approach which is currently the mainstream to exploit the increasing number of transistors on ...
Hitoshi Oi, N. Ranganathan
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
14 years 22 days ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...
MOBICOM
1996
ACM
14 years 20 days ago
Building Reliable Mobile-Aware Applications Using the Rover Toolkit
This paper discusses extensions to the Rover toolkit for constructing reliable mobile-aware applications. The extensions improve upon the existing failure model, which only addres...
Anthony D. Joseph, M. Frans Kaashoek
CASES
2005
ACM
13 years 10 months ago
Optimizing stream programs using linear state space analysis
Digital Signal Processing (DSP) is becoming increasingly widespread in portable devices. Due to harsh constraints on power, latency, and throughput in embedded environments, devel...
Sitij Agrawal, William Thies, Saman P. Amarasinghe
ERSA
2006
129views Hardware» more  ERSA 2006»
13 years 10 months ago
Group-Alignment based Accurate Floating-Point Summation on FPGAs
Floating-point summation is one of the most important operations in scientific/numerical computing applications and also a basic subroutine (SUM) in BLAS (Basic Linear Algebra Sub...
Chuan He, Guan Qin, Mi Lu, Wei Zhao