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» Latency-Aware Bus Arbitration for Real-Time Embedded Systems
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RTAS
1997
IEEE
13 years 11 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
RTAS
2008
IEEE
14 years 1 months ago
Bounding Worst-Case Response Time for Tasks with Non-Preemptive Regions
Real-time schedulability theory requires a priori knowledge of the worst-case execution time (WCET) of every task in the system. Fundamental to the calculation of WCET is a schedu...
Harini Ramaprasad, Frank Mueller
RTAS
2008
IEEE
14 years 1 months ago
Schedulability Analysis of MSC-based System Models
Message Sequence Charts (MSCs) are widely used for describing interaction scenarios between the components of a distributed system. Consequently, worst-case response time estimati...
Lei Ju, Abhik Roychoudhury, Samarjit Chakraborty
CODES
2008
IEEE
14 years 1 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...