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ETS
2010
IEEE
150views Hardware» more  ETS 2010»
13 years 10 months ago
Improving CNF representations in SAT-based ATPG for industrial circuits using BDDs
It was shown in the past that ATPG based on the Boolean Satisfiability problem is a beneficial complement to traditional ATPG techniques. Its advantages can be observed especially ...
Daniel Tille, Stephan Eggersglüß, Rene ...
CAL
2006
13 years 9 months ago
A Case for Compressing Traces with BDDs
Instruction-level traces are widely used for program and hardware analysis. However, program traces for just a few seconds of execution are enormous, up to several terabytes in siz...
Graham D. Price, Manish Vachharajani
JSAT
2006
126views more  JSAT 2006»
13 years 9 months ago
Complexity Results for Quantified Boolean Formulae Based on Complete Propositional Languages
Several propositional fragments have been considered so far as target languages for knowledge compilation and used for improving computational tasks from major AI areas (like infe...
Sylvie Coste-Marquis, Daniel Le Berre, Florian Let...
TCAD
1998
125views more  TCAD 1998»
13 years 9 months ago
BDD-based synthesis of extended burst-mode controllers
Abstract—We examine the implications of a new hazard-free combinational logic synthesis method [1], which generates multiplexor-based networks from binary decision diagrams (BDDs...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
ICFEM
2010
Springer
13 years 8 months ago
Making the Right Cut in Model Checking Data-Intensive Timed Systems
Abstract. The success of industrial-scale model checkers such as Uppaal [3] or NuSMV [12] relies on the efficiency of their respective symbolic state space representations. While d...
Rüdiger Ehlers, Michael Gerke 0002, Hans-J&ou...