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» Lattice-based computation of Boolean functions
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TCAD
2008
112views more  TCAD 2008»
13 years 7 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
FOSSACS
2004
Springer
14 years 1 months ago
Hypergraphs and Degrees of Parallelism: A Completeness Result
Abstract. In order to study relative PCF-definability of boolean functions, we associate a hypergraph Hf to any boolean function f (following [3, 5]). We introduce the notion of t...
Antonio Bucciarelli, Benjamin Leperchey
IJCAI
1997
13 years 9 months ago
Extracting Propositions from Trained Neural Networks
This paper presents an algorithm for extract­ ing propositions from trained neural networks. The algorithm is a decompositional approach which can be applied to any neural networ...
Hiroshi Tsukimoto
CORR
2010
Springer
101views Education» more  CORR 2010»
13 years 7 months ago
Circuits with arbitrary gates for random operators
We consider boolean circuits computing n-operators f : {0, 1}n {0, 1}n . As gates we allow arbitrary boolean functions; neither fanin nor fanout of gates is restricted. An operat...
Stasys Jukna, Georg Schnitger
ALGORITHMICA
2010
107views more  ALGORITHMICA 2010»
13 years 7 months ago
Capabilities and Limits of Compact Error Resilience Methods for Algorithmic Self-Assembly
Abstract Winfree's pioneering work led the foundations in the area of errorreduction in algorithmic self-assembly (Winfree and Bekbolatov in DNA Based Computers 9, LNCS, vol. ...
Sudheer Sahu, John H. Reif