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ARITH
2011
IEEE
12 years 7 months ago
Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI
— This paper presents a number of new high-radix ripple-carry adder designs based on Ling’s addition technique and a recently-published expansion thereof. The proposed adders a...
Neil Burgess
NIPS
2000
13 years 9 months ago
A Silicon Primitive for Competitive Learning
Competitive learning is a technique for training classification and clustering networks. We have designed and fabricated an 11transistor primitive, that we term an automaximizing ...
David Hsu, Miguel Figueroa, Chris Diorio
HICSS
2006
IEEE
144views Biometrics» more  HICSS 2006»
14 years 1 months ago
Knowledge Transfer: Short-Circuiting the Learning Cycle?
Knowledge is considered to be a key organizational resource in the 21st century and the knowledge management ‘movement’ has alerted organizations to the fact that they should ...
Sue Newell, Robert D. Galliers
FPL
2006
Springer
96views Hardware» more  FPL 2006»
13 years 11 months ago
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...
Allan Carroll, Carl Ebeling
TC
1998
13 years 7 months ago
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
—This paper describes a new signed-digit full adder (SDFA) circuit consisting of resonant-tunneling diodes (RTDs) and metal-oxide semiconductor field effect transistors (MOSFETs)...
Alejandro F. González, Pinaki Mazumder