179 search results - page 15 / 36 » Learning to Verify Safety Properties |
FAC
2008
13 years 7 months ago
2008
Abstract. Model checking of real-time systems against Duration Calculus (DC) specifications requires the translation of DC formulae into automata-based semantics. The existing algo...
POPL
2007
ACM
14 years 8 months ago
2007
ACM
In recent years we have seen great progress made in the area of automatic source-level static analysis tools. However, most of today's program verification tools are limited ...
TVLSI
2008
13 years 7 months ago
2008
Abstract--We present a refinement-based compositional framework for showing that pipelined machines satisfy the same safety and liveness properties as their non-pipelined specifica...
CODES
2008
IEEE
13 years 9 months ago
2008
IEEE
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
JFP
2008
13 years 7 months ago
2008
This paper shows how type effect systems can be combined with model-checking techniques to produce powerful, automatically verifiable program logics for higher order programs. The...