We introduce a class of Paxos algorithms called Vertical Paxos, in which reconfiguration can occur in the middle of reaching agreement on an individual state-machine command. Vert...
This paper presents the design and study of reconfigurable architectures for two data-link layer frame delineation techniques used for ATM and GFP. The architectures are targeted ...
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
With the XC6200 FPGA Xilinx introduced the first commercially available FPGA designed for reconfigurable computing. It has a completely new internal architecture, so new design alg...
Reiner W. Hartenstein, Michael Herz, Frank Gilbert