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LFCS
2009
Springer
14 years 2 months ago
Completeness Results for Memory Logics
Memory logics are a family of modal logics in which standard relational structures are augmented with data structures and additional operations to modify and query these structure...
Carlos Areces, Santiago Figueira, Sergio Mera
TISSEC
2010
142views more  TISSEC 2010»
13 years 2 months ago
A logical specification and analysis for SELinux MLS policy
The SELinux mandatory access control (MAC) policy has recently added a multi-level security (MLS) model which is able to express a fine granularity of control over a subject'...
Boniface Hicks, Sandra Rueda, Luke St. Clair, Tren...
ICCS
2009
Springer
14 years 2 months ago
Access Policy Design Supported by FCA Methods
Role Based Access Control (RBAC) is a methodology for providing users in an IT system specific permissions like write or read to t abstracts from specific users and binds permiss...
Frithjof Dau, Martin Knechtel
ML
2008
ACM
150views Machine Learning» more  ML 2008»
13 years 7 months ago
Learning probabilistic logic models from probabilistic examples
Abstract. We revisit an application developed originally using Inductive Logic Programming (ILP) by replacing the underlying Logic Program (LP) description with Stochastic Logic Pr...
Jianzhong Chen, Stephen Muggleton, José Car...
ICCAD
1992
IEEE
93views Hardware» more  ICCAD 1992»
13 years 11 months ago
Timing analysis in high-level synthesis
This paper presents a comprehensive timing model for behavioral-level specifications and algorithms for timing analysis in high-level synthesis. It is based on a timing network wh...
Andreas Kuehlmann, Reinaldo A. Bergamaschi