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SASP
2008
IEEE
183views Hardware» more  SASP 2008»
14 years 4 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
INFOCOM
2000
IEEE
14 years 2 months ago
Egress Admission Control
—Allocating resources for multimedia traffic flows with real-time performance requirements is an important challenge for future packet networks. However, in large-scale networks,...
Coskun Cetinkaya, Edward W. Knightly
NETWORKS
2008
13 years 9 months ago
Reformulation and sampling to solve a stochastic network interdiction problem
The Network Interdiction Problem involves interrupting an adversary's ability to maximize flow through a capacitated network by destroying portions of the network. A budget c...
Udom Janjarassuk, Jeff Linderoth
HPCA
2009
IEEE
14 years 10 months ago
Voltage emergency prediction: Using signatures to reduce operating margins
Inductive noise forces microprocessor designers to sacrifice performance in order to ensure correct and reliable operation of their designs. The possibility of wide fluctuations i...
Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. H...
BWCCA
2010
13 years 4 months ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...