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SIGOPS
2010
179views more  SIGOPS 2010»
13 years 2 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
SEM
2004
Springer
14 years 1 months ago
Towards the Development of Ubiquitous Middleware Product Lines
Abstract. Ubiquitous computing is a challenge for the design of middleware. The reasons are resource constraints, mobility, heterogeneity, etc., just to name a few. We argue that s...
Sven Apel, Klemens Böhm
BIOADIT
2006
Springer
13 years 11 months ago
Packet Classification with Evolvable Hardware Hash Functions - An Intrinsic Approach
Bandwidth demands of communication networks are rising permanently. Thus, the requirements to modern routers regarding packet classification are rising accordingly. Conventional al...
Harald Widiger, Ralf Salomon, Dirk Timmermann
MASCOTS
2008
13 years 9 months ago
Modeling Software Contention using Colored Petri Nets
Commercial servers, such as database or application servers, often attempt to improve performance via multithreading. Improper multi-threading architectures can incur contention, ...
Nilabja Roy, Akshay Dabholkar, Nathan Hamm, Lawren...
FPL
2004
Springer
164views Hardware» more  FPL 2004»
13 years 11 months ago
Dynamic Prefetching in the Virtual Memory Window of Portable Reconfigurable Coprocessors
Abstract. In Reconfigurable Systems-On-Chip (RSoCs), operating systems can primarily (1) manage the sharing of limited reconfigurable resources, and (2) support communication betwe...
Miljan Vuletic, Laura Pozzi, Paolo Ienne