Sciweavers

598 search results - page 106 / 120
» Linear Controller Design Limits of Performance
Sort
View
TC
2008
13 years 7 months ago
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
The design and performance of next-generation chip multiprocessors (CMPs) will be bound by the limited amount of power that can be dissipated on a single die. We present photonic n...
Assaf Shacham, Keren Bergman, Luca P. Carloni
CHI
2011
ACM
12 years 11 months ago
MOGCLASS: evaluation of a collaborative system of mobile devices for classroom music education of young children
Composition, listening, and performance are essential activities in classroom music education, yet conventional music classes impose unnecessary limitations on students’ ability...
Yinsheng Zhou, Graham Percival, Xinxi Wang, Ye Wan...
MOBISYS
2008
ACM
14 years 7 months ago
SeeMon: scalable and energy-efficient context monitoring framework for sensor-rich mobile environments
Proactively providing services to mobile individuals is essential for emerging ubiquitous applications. The major challenge in providing users with proactive services lies in cont...
Seungwoo Kang, Jinwon Lee, Hyukjae Jang, Hyonik Le...
ISVLSI
2007
IEEE
184views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Activity-Aware Registers Placement for Low Power Gated Clock Tree Construction
As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the m...
Weixiang Shen, Yici Cai, Xianlong Hong, Jiang Hu
ICS
2005
Tsinghua U.
14 years 26 days ago
System noise, OS clock ticks, and fine-grained parallel applications
As parallel jobs get bigger in size and finer in granularity, “system noise” is increasingly becoming a problem. In fact, fine-grained jobs on clusters with thousands of SMP...
Dan Tsafrir, Yoav Etsion, Dror G. Feitelson, Scott...