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» Linear Parametric Model Checking of Timed Automata
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ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 5 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
CIKM
2008
Springer
13 years 9 months ago
Linear time membership in a class of regular expressions with interleaving and counting
The extension of Regular Expressions (REs) with an interleaving (shuffle) operator has been proposed in many occasions, since it would be crucial to deal with unordered data. Howe...
Giorgio Ghelli, Dario Colazzo, Carlo Sartiani
DLT
2007
13 years 9 months ago
2-Visibly Pushdown Automata
Visibly Pushdown Automata (VPA) are a special case of pushdown machines where the stack operations are driven by the input. In this paper, we consider VPA with two stacks, namely 2...
Dario Carotenuto, Aniello Murano, Adriano Peron
UML
2004
Springer
14 years 1 months ago
SoftContract: Model-Based Design of Error-Checking Code and Property Monitors
This paper discusses a model-based design flow for requirements in distributed embedded software development. Such requirements are specified using a language similar to Linear T...
Luciano Lavagno, Marco Di Natale, Alberto Ferrari,...
LMCS
2007
132views more  LMCS 2007»
13 years 7 months ago
The Complexity of Model Checking Higher-Order Fixpoint Logic
Higher-Order Fixpoint Logic (HFL) is a hybrid of the simply typed λ-calculus and the modal µ-calculus. This makes it a highly expressive temporal logic that is capable of express...
Roland Axelsson, Martin Lange, Rafal Somla