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ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 7 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
ICCAD
2006
IEEE
122views Hardware» more  ICCAD 2006»
14 years 7 months ago
Fill for shallow trench isolation CMP
Shallow trench isolation (STI) is the mainstream CMOS isolation technology. It uses chemical mechanical planarization (CMP) to remove excess of deposited oxide and attain a planar...
Andrew B. Kahng, Puneet Sharma, Alexander Zelikovs...
BIBM
2009
IEEE
155views Bioinformatics» more  BIBM 2009»
14 years 5 months ago
Towards Reliable Isoform Quantification Using RNA-Seq Data
Background: In eukaryotes, alternative splicing often generates multiple splice variants from a single gene. Here weexplore the use of RNA sequencing (RNA-Seq) datasets to address...
Brian E. Howard, Steffen Heber
HYBRID
2009
Springer
14 years 5 months ago
The Optimal Boundary and Regulator Design Problem for Event-Driven Controllers
Event-driven control systems provide interesting benefits such as reducing resource utilization. This paper formulates the optimal boundary and regulator design problem that minim...
Pau Martí, Manel Velasco, Enrico Bini
ICSE
2009
IEEE-ACM
14 years 5 months ago
MINTS: A general framework and tool for supporting test-suite minimization
Regression test suites tend to grow over time as new test cases are added to exercise new functionality or to target newly-discovered faults. When test suites become too large, th...
Hwa-You Hsu, Alessandro Orso