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» Linearization of hybrid processes
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HOTI
2005
IEEE
14 years 3 months ago
Hybrid Cache Architecture for High Speed Packet Processing
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
Zhen Liu, Kai Zheng, Bin Liu
RECONFIG
2008
IEEE
104views VLSI» more  RECONFIG 2008»
14 years 4 months ago
A Hybrid FPGA/Coarse Parallel Processing Architecture for Multi-modal Visual Feature Descriptors
Lars Baunegaard With Jensen, Anders Kjaer-Nielsen,...
DEXAW
2005
IEEE
114views Database» more  DEXAW 2005»
14 years 3 months ago
A Query Processing Method for Hybrid Wireless-Broadcast Networks
Jing Cai, Tsutomu Terada, Takahiro Hara, Shojiro N...
EUROMICRO
2005
IEEE
14 years 3 months ago
A Hybrid Component-Based System Development Process
Egon Teiniker, Gernot Schmoelzer, Joerg Faschingba...