1929 search results - page 246 / 386 » Load Balancing with Memory |
118
Voted
IEEEPACT
2003
IEEE
15 years 7 months ago
2003
IEEE
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
124
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ISCA
1999
IEEE
15 years 6 months ago
1999
IEEE
Sequential consistency (SC) is the simplest programming interface for shared-memory systems but imposes program order among all memory operations, possibly precluding high perform...
131
Voted
ICS
2000
Tsinghua U.
15 years 5 months ago
2000
Tsinghua U.
As the performance gap between the CPU and main memory continues to grow, techniques to hide memory latency are essential to deliver a high performance computer system. Prefetchin...
113
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TCAD
2008
15 years 2 months ago
2008
New fusion memory devices consisting of multiple heterogeneous memory components in a single die or package offer efficient ways to optimize embedded systems in terms of energy, pe...
108
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CF
2010
ACM
15 years 7 months ago
2010
ACM
Branches that depend directly or indirectly on load instructions are a leading cause of mispredictions by state-of-the-art branch predictors. For a branch of this type, there is a...