While synchrony and asynchrony are two distinct concepts of concurrency theory, effective and formally defined embedded system design methodologies usually mix the best from both...
The widening gap between CPU and memory speed has made caches an integral feature of modern highperformance processors. The high degree of configurability of cache memory can requ...
Rahman Hassan, Antony Harris, Nigel P. Topham, Ari...
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
—This paper presents an architectural solution to address the problem of scalable routing in very large sensor networks. The control complexities of the existing sensor routing p...
— Motion planning for robotic arms is important for real, physical world applications. The planning for arms with high-degree-of-freedom (DOF) is hard because its search space is...