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ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
14 years 4 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 3 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
INFORMS
2000
128views more  INFORMS 2000»
13 years 10 months ago
A Revised Simplex Search Procedure for Stochastic Simulation Response Surface Optimization
We develop a variant of the Nelder-Mead (NM) simplex search procedure for stochastic simulation optimization that is designed to avoid many of the weaknesses encumbering such dire...
David G. Humphrey, James R. Wilson
ICADL
2004
Springer
161views Education» more  ICADL 2004»
14 years 4 months ago
An Implementation of Web Image Search Engines
This paper presents our implementation techniques for an intelligent Web image search engine. A reference architecture of the system is provided and addressed in this paper. The s...
Zhiguo Gong, Leong Hou U, Chan Wa Cheang
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
13 years 2 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...