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» LogP: Towards a Realistic Model of Parallel Computation
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DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 1 months ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
IJON
2006
76views more  IJON 2006»
13 years 7 months ago
Evolving networks of integrate-and-fire neurons
This paper addresses the following question: ``What neural circuits can emulate the monosynaptic correlogram generated by a direct connection between two neurons?'' The ...
Francisco J. Veredas, Francisco J. Vico, Jos&eacut...
DAC
2008
ACM
14 years 8 months ago
Daedalus: toward composable multimedia MP-SoC design
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which ...
Hristo Nikolov, Mark Thompson, Todor Stefanov, And...
DCOSS
2006
Springer
13 years 11 months ago
Distributed Optimal Estimation from Relative Measurements for Localization and Time Synchronization
Abstract. We consider the problem of estimating vector-valued variables from noisy "relative" measurements. The measurement model can be expressed in terms of a graph, wh...
Prabir Barooah, Neimar Machado da Silva, Joã...
HPDC
2005
IEEE
14 years 1 months ago
A new metric for robustness with application to job scheduling
Scheduling strategies for parallel and distributed computing have mostly been oriented toward performance, while striving to achieve some notion of fairness. With the increase in ...
Darin England, Jon B. Weissman, Jayashree Sadagopa...