The trend towards processors with more and more parallel cores is increasing the need for software that can take advantage of parallelism. The most widespread method for writing p...
We present a general algorithm scheme for model checking logics of knowledge, common knowledge and linear time, based on simulations to a class of structures that capture the way t...
Abstract. One-counter processes are pushdown processes over a singleton stack alphabet (plus a stack-bottom symbol). We study the problems of model checking asynchronous products o...
d abstract) Christel Baiera, Joost-Pieter Katoenb;c and Holger Hermannsc aLehrstuhl fur Praktische Informatik II, University of Mannheim 68131 Mannheim, Germany bLehrstuhl fur Info...
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...