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» Loop Parallelization in the Polytope Model
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NPC
2005
Springer
14 years 1 months ago
Performance Modelling and Optimization of Memory Access on Cellular Computer Architecture Cyclops64
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
Yanwei Niu, Ziang Hu, Kenneth E. Barner, Guang R. ...
TPDS
1998
157views more  TPDS 1998»
13 years 7 months ago
A Compiler Optimization Algorithm for Shared-Memory Multiprocessors
This paper presents a new compiler optimization algorithm that parallelizes applications for symmetric, sharedmemory multiprocessors. The algorithm considers data locality, parall...
Kathryn S. McKinley
WSC
2004
13 years 9 months ago
A Decision Tool for Assembly Line Breakdown Action
Assembly lines with closed loop parallel lanes have the potential to continue to be productive when individual stations breakdown. A requirement in such parallel lane systems is t...
Frank Shin
CLUSTER
2004
IEEE
13 years 11 months ago
Predicting memory-access cost based on data-access patterns
Improving memory performance at software level is more effective in reducing the rapidly expanding gap between processor and memory performance. Loop transformations (e.g. loop un...
Surendra Byna, Xian-He Sun, William Gropp, Rajeev ...
CLUSTER
2007
IEEE
14 years 1 months ago
Optimal synchronization frequency for dynamic pipelined computations on heterogeneous systems
— In this paper we give a theoretical model for determining the synchronization frequency that minimizes the parallel execution time of loops with uniform dependencies dynamicall...
Florina M. Ciorba, Ioannis Riakiotakis, Theodore A...