315 search results - page 15 / 63 » Loop Termination Prediction |
DCC
2008
IEEE
14 years 7 months ago
2008
IEEE
It was recently shown that the symmetric multiple-description (MD) quadratic rate-distortion function for memoryless Gaussian sources and two descriptions can be achieved by dithe...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
PACT
1997
Springer
13 years 11 months ago
1997
Springer
A technique for estimating the cost of executing a loop nest in parallel (parallel start-up overhead) is described in this paper. This technique is of utmost importance for paralle...
BMCBI
2004
13 years 7 months ago
2004
Background: Because loops connect regular secondary structures, analysis of the former depends directly on the definition of the latter. The numerous assignment methods, however, ...
ISCAS
2008
IEEE
14 years 2 months ago
2008
IEEE
— A new oscillator sensitivity analysis that predicts the impact of parameter variations of a VCO in a PLL is presented in this paper. Sensitivities of an oscillator’s steady-s...