173 search results - page 8 / 35 » Low power and low voltage CMOS digital circuit techniques |
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
VTS
2002
IEEE
14 years 19 days ago
2002
IEEE
Very Low Voltage (VLV) testing has been proposed to increase flaw detection in bulk silicon CMOS integrated circuits and this paper explores these and additional advantages in the...
ECCTD
2011
12 years 7 months ago
2011
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
CDES
2006
13 years 9 months ago
2006
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
SOCC
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper a new ultra low power SRAM cell is proposed. In the proposed SRAM topology, additional circuitry has been added to a standard 6T-SRAM cell to improve the static nois...