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» Low-level Benchmarking of a New Cluster Architecture
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APCSAC
2007
IEEE
14 years 17 days ago
Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters
Many years of CMOS technology scaling have resulted in increased power densities and higher core temperatures. Power and temperature concerns are now considered to be a primary cha...
Daniel C. Vanderster, Amirali Baniasadi, Nikitas J...
VLDB
1998
ACM
147views Database» more  VLDB 1998»
14 years 23 days ago
Architecture of Oracle Parallel Server
Oracle Parallel Server (OPS) is a shared disk RDBMS. We present a high level overview of the main architectural issues of OPS and their evolution throughout the releases of the Or...
Roger Bamford, D. Butler, Boris Klots, N. MacNaugh...
FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
14 years 5 days ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
14 years 1 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
CCGRID
2006
IEEE
14 years 2 months ago
Design and Evaluation of Nemesis, a Scalable, Low-Latency, Message-Passing Communication Subsystem
This paper presents a new low-level communication subsystem called Nemesis. Nemesis has been designed and implemented to be scalable and efficient both in the intranode communica...
Darius Buntinas, Guillaume Mercier, William Gropp