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» MODULA-2 and Its Compilation
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CONCURRENCY
2007
95views more  CONCURRENCY 2007»
15 years 4 months ago
Automated and accurate cache behavior analysis for codes with irregular access patterns
Abstract. The memory hierarchy plays an essential role in the performance of current computers, thus good analysis tools that help predict and understand its behavior are required....
Diego Andrade, Manuel Arenaz, Basilio B. Fraguela,...
LCTRTS
2009
Springer
15 years 11 months ago
Eliminating the call stack to save RAM
Most programming languages support a call stack in the programming model and also in the runtime system. We show that for applications targeting low-power embedded microcontroller...
Xuejun Yang, Nathan Cooprider, John Regehr
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
15 years 10 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
ICS
2007
Tsinghua U.
15 years 10 months ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger
LCTRTS
2007
Springer
15 years 10 months ago
Tetris: a new register pressure control technique for VLIW processors
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
Weifeng Xu, Russell Tessier