Sciweavers

20 search results - page 3 / 4
» Mach on a Virtually Addressed Cache Architecture
Sort
View
ICS
2004
Tsinghua U.
14 years 1 months ago
CQoS: a framework for enabling QoS in shared caches of CMP platforms
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
Ravi R. Iyer
SOSP
1993
ACM
13 years 9 months ago
Improving IPC by Kernel Design
Inter-process communication (ipc) has to be fast and e ective, otherwise programmers will not use remote procedure calls(RPC),multithreadingand multitasking adequately. Thus ipc p...
Jochen Liedtke
VEE
2009
ACM
107views Virtualization» more  VEE 2009»
14 years 2 months ago
Architectural support for shadow memory in multiprocessors
Runtime monitoring support serves as a foundation for the important tasks of providing security, performing debugging, and improving performance of applications. Often runtime mon...
Vijay Nagarajan, Rajiv Gupta
HPDC
2008
IEEE
14 years 2 months ago
Combining batch execution and leasing using virtual machines
As cluster computers are used for a wider range of applications, we encounter the need to deliver resources at particular times, to meet particular deadlines, and/or at the same t...
Borja Sotomayor, Kate Keahey, Ian T. Foster
NOCS
2007
IEEE
14 years 1 months ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...