20 search results - page 4 / 4 » Mach on a Virtually Addressed Cache Architecture |
EUROPAR
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
AGENTS
1997
Springer
13 years 11 months ago
1997
Springer
This paper presents a domain-independent architecture for facilitating visual problem solving between robots or softbots and humans. The architecture de nes virtual and human agen...
SIGMETRICS
2008
ACM
13 years 7 months ago
2008
ACM
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
WWW
2004
ACM
14 years 8 months ago
2004
ACM
Content delivery networks have evolved beyond traditional distributed caching. With services such as Akamai's EdgeComputing it is now possible to deploy and run enterprise bu...