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DSD
2011
IEEE
200views Hardware» more  DSD 2011»
12 years 9 months ago
Microthreading as a Novel Method for Close Coupling of Custom Hardware Accelerators to SVP Processors
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...
Jaroslav Sykora, Leos Kafka, Martin Danek, Lukas K...
MOBIHOC
2003
ACM
14 years 9 months ago
Energy-efficient caching strategies in ad hoc wireless networks
In this paper, we address the problem of energy-conscious cache placement in wireless ad hoc networks. We consider a network comprising a server with an interface to the wired net...
Pavan Nuggehalli, Vikram Srinivasan, Carla-Fabiana...
ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
14 years 4 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
SIGSOFT
2004
ACM
14 years 10 months ago
Testing static analysis tools using exploitable buffer overflows from open source code
Five modern static analysis tools (ARCHER, BOON, PolySpace C Verifier, Splint, and UNO) were evaluated using source code examples containing 14 exploitable buffer overflow vulnera...
Misha Zitser, Richard Lippmann, Tim Leek
BMCBI
2008
130views more  BMCBI 2008»
13 years 10 months ago
IDEA: Interactive Display for Evolutionary Analyses
Background: The availability of complete genomic sequences for hundreds of organisms promises to make obtaining genome-wide estimates of substitution rates, selective constraints ...
Amy Egan, Anup Mahurkar, Jonathan Crabtree, Jonath...