10 search results - page 1 / 2 » Making DRAM Refresh Predictable |
ECRTS
2010
IEEE
13 years 11 months ago
2010
IEEE
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Sched...
ISCA
2012
IEEE
12 years 1 months ago
2012
IEEE
Modern memory controllers employ sophisticated address mapping, command scheduling, and power management optimizations to alleviate the adverse effects of DRAM timing and resource...
ESTIMEDIA
2007
Springer
14 years 4 months ago
2007
Springer
SoCs for multimedia applications typically use only one port to off-chip DRAM for cost reasons. The sharing of interconnect and the off-chip DRAM port by several IP blocks makes t...
USS
2008
14 years 1 months ago
2008
Contrary to popular assumption, DRAMs used in most modern computers retain their contents for several seconds after power is lost, even at room temperature and even if removed fro...
SIGGRAPH
2010
ACM
14 years 3 months ago
2010
ACM
Limited spatial resolution of current displays makes the depiction of very fine spatial details difficult. This work proposes a novel method applied to moving images that takes ...