We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a re...
Dealing with global on-chip memory allocation/de-allocation in a dynamic yet deterministic way is an important issue for upcoming billion transistor multiprocessor System-on-a-Chi...
We have developed a mobile thin-client server named ”HTTP-FUSE-KNOPPIX-BOX” that incorporates mechanisms for increasing performance, distributing load, and providing fault tole...
Jun Kanai, Mitaro Namiki, Kuniyasu Suzaki, Toshiki...
New storage-class memory (SCM) technologies, such as phasechange memory, STT-RAM, and memristors, promise user-level access to non-volatile storage through regular memory instruct...
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...