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WMPI
2004
ACM
14 years 2 months ago
Scalable cache memory design for large-scale SMT architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
Muhamed F. Mudawar
INFOCOM
1992
IEEE
14 years 27 days ago
An Assessment of State and Lookup Overhead in Routers
The current Internet is based on a stateless (datagram) architecture. However, many recent proposals rely on the maintenance of state information within network routers, leading t...
Deborah Estrin, Danny J. Mitzel
PODC
2000
ACM
14 years 12 days ago
Efficient atomic broadcast using deterministic merge
We present an approach for merging message streams from producers distributed over a network, using a deterministic algorithm that is independent of any nondeterminism of the syst...
Marcos Kawazoe Aguilera, Robert E. Strom
CORR
2010
Springer
92views Education» more  CORR 2010»
13 years 9 months ago
Performance Investigation of Virtual Private Networks with Different Bandwidth Allocations
A Virtual Private Network (VPN) provides private network connections over a publicly accessible shared network. The effective allocation of bandwidth for VPNs assumes significance...
Mahalakshmi Chidambara Natarajan, Ramaswamy Muthia...
IPOM
2007
Springer
14 years 3 months ago
Measurement and Analysis of Intraflow Performance Characteristics of Wireless Traffic
It is by now widely accepted that the arrival process of aggregate network traffic exhibits self-similar characteristics which result in the preservation of traffic burstiness (hig...
Dimitrios P. Pezaros, Manolis Sifalakis, David Hut...