371 search results - page 14 / 75 » Mapping Applications to Tiled Multiprocessor Embedded System... |
CF
2009
ACM
14 years 2 months ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
DFT
2000
IEEE
13 years 11 months ago
2000
IEEE
We present a configuration technique for a Large Area Integrated Circuit (LAIC) which is manufactured by wafer stepping. A LAIC consists of four identical subsystems, i.e., a subs...
TVLSI
2008
13 years 7 months ago
2008
To satisfy the advanced forward-error-correction (FEC) standards, in which the Convolutional code and Turbo code may co-exit, a prototype design of a unified Convolutional/Turbo de...
ICPP
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper, we explore the use of hierarchically structured multiprocessor tasks (M-tasks) for programming multi-core cluster systems. These systems often have hierarchically s...