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» Mapping Applications to a Coarse Grain Reconfigurable System
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146
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FPL
2006
Springer
129views Hardware» more  FPL 2006»
15 years 9 months ago
Architecture Exploration and Tools for Pipelined Coarse-Grained Reconfigurable Arrays
We present a heavily parametrized tool suite that allows the modeling and exploration of heterogeneous, coarse-grained, heavily pipelined reconfigurable architectures. Our tools p...
Florian Stock, Andreas Koch
ICES
2005
Springer
177views Hardware» more  ICES 2005»
15 years 11 months ago
Evolving Hardware by Dynamically Reconfiguring Xilinx FPGAs
Evolvable Hardware arises as a promising solution for automatic digital synthesis of digital and analog circuits. During the last decade, a special interest has been focused on evo...
Andres Upegui, Eduardo Sanchez
176
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FPGA
2004
ACM
158views FPGA» more  FPGA 2004»
15 years 11 months ago
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
ARC
2007
Springer
150views Hardware» more  ARC 2007»
15 years 9 months ago
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Be...