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FPL
2009
Springer
91views Hardware» more  FPL 2009»
14 years 2 months ago
Large multipliers with fewer DSP blocks
Recent computing-oriented FPGAs feature DSP blocks including small embedded multipliers. A large integer multiplier, for instance for a double-precision floating-point multiplier...
Florent de Dinechin, Bogdan Pasca
UML
2001
Springer
14 years 2 months ago
An Action Semantics for MML
This paper describes an action semantics for UML based on the Meta-Modelling Language (MML) - a precise meta-modelling language designed for developing families of UML languages. A...
José M. Álvarez, Tony Clark, Andy Ev...
DEXAW
2000
IEEE
165views Database» more  DEXAW 2000»
14 years 2 months ago
Summarizing Video Datasets in the Spatiotemporal Domain
In this paper we address the problem of analyzing and managing complex dynamic scenes captured in video. We present an approach to summarize video datasets by analyzing the trajec...
Anthony Stefanidis, Panos Partsinevelos, Peggy Ago...
IPPS
1998
IEEE
14 years 2 months ago
A Performance Evaluation of CP List Scheduling Heuristics for Communication Intensive Task Graphs
List-based priority schedulers have long been one of the dominant classes of static scheduling algorithms. Such heuristics have been predominantly based around the "critical ...
Benjamin S. Macey, Albert Y. Zomaya
ISPD
1997
ACM
103views Hardware» more  ISPD 1997»
14 years 2 months ago
On two-step routing for FPGAS
We present results which show that a separate global and detailed routing strategy can be competitive with a combined routing process. Under restricted architectural assumptions, ...
Guy G. Lemieux, Stephen Dean Brown, Daniel Vranesi...