In this paper we introduce the iTask system: a set of combinators to specify work flows in a pure functional language at a very high level of abstraction. Work flow systems are au...
Rinus Plasmeijer, Peter Achten, Pieter W. M. Koopm...
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
The differing requirements for concurrency models in programming languages and databases are widely diverse and often seemingly incompatible. The rigid provision of a particular c...
David S. Munro, Richard C. H. Connor, Ronald Morri...
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
In this paper, we study the reliable decentralized supervisory control of discrete event systems (DESs) under the general architecture, in which the decision for controllable event...