30 search results - page 1 / 6 » Mapping to Reduce Contention in Multiprocessor Architectures |
IPPS
1993
IEEE
14 years 3 months ago
1993
IEEE
Reducingcommunicationoverheadhas been widely recognized as a requirement for achieving efficient mappings which substantially reduce the execution time of parallel algorithms. Th...
HPCA
2007
IEEE
14 years 11 months ago
2007
IEEE
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
SIPS
2008
IEEE
14 years 5 months ago
2008
IEEE
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
IWMM
2011
Springer
13 years 1 months ago
2011
Springer
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
HPCA
2001
IEEE
14 years 11 months ago
2001
IEEE
The memory overhead introduced by directories constitutes a major hurdle in the scalability of cc-NUMA architectures, which makes the shared-memory paradigm unfeasible for very la...