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» Massively parallel processing on a chip
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PARELEC
2006
IEEE
14 years 1 months ago
Hierarchical Partitioning for Piecewise Linear Algorithms
processor arrays can be used as accelerators for a plenty of data flow-dominant applications. The explosive growth in research and development of massively parallel processor arr...
Hritam Dutta, Frank Hannig, Jürgen Teich
GECCO
2005
Springer
128views Optimization» more  GECCO 2005»
14 years 1 months ago
Collaborative interactive evolution
Interactive evolutionary computation (IEC) has proven useful in a variety of applications by combining the subjective evaluation of a user with the massive parallel search power o...
Sean R. Szumlanski, Annie S. Wu, Charles E. Hughes
AAAI
2006
13 years 9 months ago
Conflict Resolution and a Framework for Collaborative Interactive Evolution
Interactive evolutionary computation (IEC) has proven useful in a variety of applications by combining the subjective evaluation of a user with the massive parallel search power o...
Sean R. Szumlanski, Annie S. Wu, Charles E. Hughes
ISCAPDCS
2008
13 years 9 months ago
Parallel Embedded Systems: Where Real-Time and Low-Power Meet
This paper introduces a combination of models and proofs for optimal power management via Dynamic Frequency Scaling and Dynamic Voltage Scaling. The approach is suitable for syste...
Zdravko Karakehayov, Yu Guo
DELTA
2008
IEEE
13 years 9 months ago
Dynamic Co-operative Intelligent Memory
As semiconductor technology advances, the performance gap between processor and memory has become one of the major issues in computer design. In order to bridge this gap, many met...
Xiaoyong Wen, Faycal Bensaali, Reza Sotudeh