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» Massively parallel processing on a chip
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IPPS
2009
IEEE
14 years 2 months ago
A cross-input adaptive framework for GPU program optimizations
Abstract—Recent years have seen a trend in using graphic processing units (GPU) as accelerators for general-purpose computing. The inexpensive, single-chip, massively parallel ar...
Yixun Liu, Eddy Z. Zhang, Xipeng Shen
IPPS
2009
IEEE
14 years 2 months ago
Long time-scale simulations of in vivo diffusion using GPU hardware
To address the problem of performing long time simulations of biochemical pathways under in vivo cellular conditions, we have developed a lattice-based, reaction-diffusion model t...
Elijah Roberts, John E. Stone, Leonardo Sepulveda,...
ICDCS
2006
IEEE
14 years 1 months ago
Distributed Computing for Efficient Hyperspectral Imaging Using Fully Heterogeneous Networks of Workstations
Hyperspectral imaging is a new technique which has become increasingly important in many remote sensing applications, including automatic target recognition for military and defen...
Antonio Plaza, Javier Plaza, David Valencia
IPPS
2000
IEEE
13 years 11 months ago
ATOLL, a New Switched, High Speed Interconnect in Comparison to Myrinet and SCI
Abstract. While standard processors achieve supercomputer performance, a performance gap exists between the interconnect of MPP's and COTS. Standard solutions like Ethernet ca...
Markus Fischer, Ulrich Brüning, Jörg Klu...
DCC
2010
IEEE
13 years 6 months ago
Neural Markovian Predictive Compression: An Algorithm for Online Lossless Data Compression
This work proposes a novel practical and general-purpose lossless compression algorithm named Neural Markovian Predictive Compression (NMPC), based on a novel combination of Bayesi...
Erez Shermer, Mireille Avigal, Dana Shapira