27 search results - page 5 / 6 » Master slave speculative parallelization |
FDL
2007
IEEE
13 years 11 months ago
2007
IEEE
Transaction-level modelling (TLM) is a poorlyterm, promising a level of abstraction like RTL (register transfer level), where the key feature is a `transaction'. But unlike r...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
PPOPP
2006
ACM
14 years 1 months ago
2006
ACM
We investigate a transactional memory runtime system providing scaling and strong consistency for generic C++ and SQL applications on commodity clusters. We introduce a novel page...
CP
2005
Springer
14 years 29 days ago
2005
Springer
We combine mixed integer linear programming (MILP) and constraint programming (CP) to minimize tardiness in planning and scheduling. Tasks are allocated to facilities using MILP an...
CONSTRAINTS
2006
13 years 7 months ago
2006
We combine mixed integer linear programming (MILP) and constraint programming (CP) to minimize tardiness in planning and scheduling. Tasks are allocated to facilities using MILP an...